profiles search for area_of_expertise: Digital-RTL
I have been working on Analog/Mixed-Signal Integrated Circuits design since last 16 years. I graduated from NED UET, Karachi in 2001 and then worked with Avaz Networks, a Silicon-Valley Company on RTL design and verification of a high-density Line Echo Cancellation Engine for a couple of years. Joined Linkoping University, Sweden in 2003 for Masters in SOC, which concluded with a Masters Thesis on Sigma-Delta Modulators with Fraunhofer Institute of Integrated Circuits, Germany in 2005. The same year I joined University of Trento and Fondazione Bruno Kessler, Trento, Italy for my PhD on Readout Interface Design for MEMS Capacitive Microphones. Worked with ST-Microelectronics, Milano and Analog-Devices, Copenhagen as a Guest PhD Student. This Phd results in 20+ publications and 2 patents with 3 successful MEMS Readout ASICs.
Author of Yosys, IceStorm, PicoRV32, and other Open Source things
Developer of open source EDA tools on Open Circuit Design
AREA OF EXPERTISE
- Analog | Analog IC | Analog IC Design | Analog-Layout | Analog-Mixed Signal-DV | Analog-Simulation | Analog-Verification | ASIC Design/Verification | Automatic Circuit Design | CAD-Dev | CAD-Scripts | Communication and Signal Processing | Cryptography | Design Automation | Digital-DFT | Evolutionary algorithm | signal processing | SOC-DV | SOC-ESD | SOC-Packaging | System-PCB | System-Signal-Integrity | Analog-ADC | Analog-LDO | Digital-BE | Digital-DV | Digital-RTL | System-DSP | System-Filters |
Engineer, who typically worked in start up environment. So do A-Z, a-z and 1 - infinity if something has to work
I am an Analog/mixed signal IC designer. I worked with different technologies like ams035, xh035 and st 130nm.
Recent college graduate from San Jose State University with Masters in Electrical Engineering degree. Specialization - Digital Design and Verification.
- Analog CMOS CIrcuit | C/C++ | CIrcuit Design | Eagle CAD | Electric CAD | Matlab | ngspice | Object Oriented programming | PCB Design and Verification flow | Perl Scripting | Real Time Programming | RTL Simulation | Software Developer | System Verilog | Tanner L-Edit | Unix/Linux environments | Verilog | VHDL | VLSI/ASIC and SOC Development |
I am a digital design/verification engineer. I have 2 years of full-time industry experience. In total, I have 4.5 years of experience in RTL design, Electronic Design Automation and Verification using VHDL/Verilog, Perl, Tcl and Linux. I was the #1 graduate of Bahcesehir University in Mechatronics Engineering in 2013
Mad about OSS system design, specialized in video compression and image processing, CNN and dedicated HPC architectures. New deals in low power design
AREA OF EXPERTISE
- Analog-SMPS | Analog: Simulation | Analog: Verification | Circuits: Memory | Circuits: Microcontrollers | Circuits: Power Management | Circuits: Sensors | Circuits: Signal Processing | Digital-DV | Digital-RTL | Digital: DFT | Digital: Placement and Routing | Miscellaneous: Neural Networks | SOC-DV | SoC: ESD | SoC: Floorplanning | SoC: Verification | System-DSP | System: Chip Editing | System: FPGA Programming |