Manager of Universal Avionics System Corporation(UASC) PLD design group. This group is tasked with designing, implementing and approving, in accordance with RTCA/DO-254 guidance, all ASIC/FPGA used in the Universal Avionics product line.
Mixed background in computer science, applied mathematics and electrical engineering. Expert in algorithms to custom core development, system architecture, integration and functional verification.
Hugo Hernández received his B.S. degree in Electronic Engineering from The Industrial University of Santander, Colombia in 2005 and M.S. degree in Electrical Engineering from Polytechnic School of the University of São Paulo (EPUSP), Brazil in 2008. Hugo obtained his Ph.D degree in Electrical Engineering from University of São Paulo in 2015. He was Mixed Signal IC designer at LSITEC and DFCHIP (Brazil) where worked for 8 years, and Pos-doc of the Universidad de Sao Paulo in collaboration with ALICE-CERN as analog IC designer in the SAMPA ASIC project. He was Adjunct Professor of the Control and Automation course at the Engineering Institute (CUVG) of UFMT for 2 years. He is currently Adjunct Professor of the Department of Electrical Engineering of the Federal University of Minas Gerais (UFMG).
Experienced leader of industry and academia focusing on developing customized hardware accelerators for low power mobile, AI and IoT devices. Over 20-years hands-on experience in all aspects of SOC and processor design. Specialties: memory design (SRAM, regfile, CAM), VLSI design for best Power, Performance, and Area (PPA) design point. Power management and power conversion including dc/dc and ac/dc. Computer Architecture and Hardware accelerator using In-Memory-Computing and Emerging Technologies (RRAM)
I am enthuastic engineer who has been doing software engineering (Linux kernel), electronics, and now chip designs. My day job is leading teams (senior director) focusing on virtualization and security.
PhD student working on a superconducting FPGA design aiming to work on neuromorphic computing in the future.
I have been a Professor in The Dept. of Electronics and Communication, College of Engineering, Guindy (CEG), Anna University, Chennai, India and I have retired last year after being on the faculty of this University for twenty eight years. I continue to teach courses as a Guest Faculty in the same Dept. at CEG, Anna University in the areas of Analog, Mixed Signal, RF and Communication Systems and IC Design. I have supervised student teams in building Small Satellites (Avionics subsystems) and also CMOS IC Designs. I have also supervised Masters and Doctoral thesis in the areas of GPS (baseband), uP Clock PLLs and CDRs, RF LNAs, and resonant sensors.
I am a EE with decades of experience in multiple disciples including analog, RF, bio-engineering, embedded systems design, ... a long list. I've had a long career and am fortunate to be able to follow my interest where ever they might be.
Veteran computer architect, 40+ years experience in I/O systems design for mainframes and x86. entrepreneur, certied PPM, Risk Management Specialist (Monte Carlo Simulation), QRPD - Quality Rapid Product Development evanghelist.
Enthusiastic VLSI Design Engineer currently working in Domain Specific Architectures