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"profiles" search for "skills": EDA
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Number of Results: 6

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M. Shalan

Skills

ASIC C/C++ EDA Perl Software Developer Verilog

Area of Expertise

Academic: Teaching Digital: Placement and Routing Digital: RTL Digital: Synthesis Digital: Verification System: FPGA Programming
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Calvin

PhD student working on a superconducting FPGA design aiming to work on neuromorphic computing in the future.

Skills

C/C++ Perl Python System Verilog spice Klayout QEDA Verilog-to-routing

Area of Expertise

Academic: Research CAD: Scripting CAD: Tool Development Digital: Placement and Routing Digital: RTL Digital: Synthesis Digital: Verification Physical Layout FPGA Architecture
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Zhiyang Ong

Zhiyang Ong is a globetrotting, venturesome cultural chameleon tackling challenges related to U.N. Sustainable Development Goals, using a skill set that spans electrical engineering and computer science. He is a Ph.D. student at Texas A&M University's electrical & computer engineering department. He is currently working on noise-based logic and embedded deep learning, and had worked on problems in electronic design automation, VLSI formal verification, satisfiability modulo theories, network science (or complex systems), evolutionary computation, network optimization, and multi-objective optimization. He has also designed multiple VLSI circuits and systems, from SRAMs and processors to a Viterbi decoder and a tree adder. In his free time, he was recently working on solving the Quadratic Travelling Salesman Problem (QTSP) with his research collaborators, using an adiabatic quantum computer from D-Wave Systems.

Skills

Cadence Encounter Cadence NC-Verilog Cadence Virtuoso Electric VLSI Design System Mentor/Siemens EDA ModelSim Synopsys Avanwaves Synopsys Cosmos Synopsys Design Compiler Synopsys HSPICE Synopsys NanoSim Synopsys PrimeTime Xilinx ISE

Area of Expertise

Academic: Student design space exploration of VLSI system designs Digital: RTL RTL code generation VLSI layout design
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A Devipriya

Skills

Python System Verilog C programming Xilinx ISE Design Suite eSim EDA Tool Skywater 130nm

Area of Expertise

Digital Design Verilog coding
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Joseph Kiniry

Dad. Partner. Scientist. Activist. Maker. — He/His

Skills

C/C++ Cadence Virtuoso Eagle CAD Leadership Magic CAD Matlab ngspice Octave Perl Python Software Developer System Verilog System-C Tcl/Tk Verilog VHDL Bluespec Chisel EDA R&D

Area of Expertise

Academic: Research Business: Design Services Business: Management CAD: Tool Development Digital: RTL Digital: Synthesis Digital: Verification Miscellaneous: Cryptography SoC: Verification System: FPGA Programming System: Quality Assurance System: Test Programming Miscellaneous: Formal Methods
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Alex Novickis

A bit of everything - mostly focused on networking system level designs / FPGA / Switch Fabric from concept to validation - and now automotive

Skills

Allegro Altium C/C++ EDA Forte Modelsim Python RTL System Verilog System-C Tanner L-Edit Verilog VHDL

Area of Expertise

Circuits: Signal Processing Miscellaneous: Cryptography System: FPGA Programming System: PCB System: Power Integrity System: Signal Integrity