Trained as a Software Engineer, i am an advocate for Libre Ethical Technology in business.
im a student who want learn design VHDL
I am a software developer, trying to learn about hardware design
Electronics Engineering Student at Institut Teknologi Sepuluh Nopember
Author of Yosys, IceStorm, PicoRV32, and other Open Source things
Developer of open source EDA tools on Open Circuit Design
I'm a staff member at efabless responsible for product management, business development, strategy, partnerships.
Full time: Electronics Engineer with an interest in embedded systems solutions. I can take a project goal and design, develop, prototype, program, validate an embedded system reaching that goal. Part-time: Maker, interested in rapid prototyping, my lab has basic machines: CO2 Laser cutter, 3d printers, small milling machine. I've built 3 of my own 3d printers.
I received the B.S. degree in Industrial Electronics Engineering from the Universitat Politècnica de Catalunya, Spain, in 2007, and the M.S. degree in Micro- and Nanoelectronics Engineering in 2009 and the Ph.D. degree in Microelectronics and Electronic Systems in 2015 both from the Universitat Autònoma de Barcelona, Spain. From 2006 to 2008, I was with Investigation Total Ware, S.A., Spain, where I was engaged in analog and mixed-signal circuit design for highly reliable wireless telecommunication systems. From 2008 to 2015, I was with the Integrated Circuits and Systems design group at the Institut de Microelectrònica de Barcelona, CNM, CSIC, Spain, designing low-power high-precision mixed-signal ASICs for integrated smart sensors and IP blocks. From 2015 to 2016, I was with Broadcom Ltd., Barcelona, Spain, developing low-power CMOS IPs like low-temperature-drift oscillators, varible-temperature-coefficient current/voltage generators, temperature sensors, cross-domain level shifting and biasing circuits, touch-sensor transmitter drivers. I am co-author of 12 publications and participant in several research and industrial projects using a wide range of CMOS technology nodes. I am recipient of the 2007 Highest Grade Point Average in the Graduating Class Award, the 2014 Best Paper Award and the 2015 Student Best Paper Award Honorable Mention. My skills include: high-performance continuous-time/switched-capacitor circuits such as low-power high-resolution ADCs/DACs using Class-AB OpAmps; system high-level modeling (SciPy/Sage, Matlab); system electrical-level modeling (Verilog/-A/-AMS); EKV circuit-level modeling; full-custom IC design cycle (gEDA Tools/Cadence Virtuoso: from schematics to layout and verification); development of low-noise and low-distortion test equipment (including microcontrollers and FPGAs) and software (using C++, Tcl, VB, Python); and, experimental IC measures and parameter extraction.
Computer Science Engineer with extensive hardware knowledge.
Embedded System Engineer
I've done hardware and software across the years, and I have a design for a chip that I've been itching to build since the 1980s, this looks like my chance.
Graduated 4 tears back in engineering specialized in electronics and telecommuniation engineering with a first class. Now I am working at a startup as the team lead of the embedded design team. I am also a postgraduate student in Msc in wireless communication engineering course. Creon Solutions is my freelancer name. I do image processing, PCB and circuit designs ...etc in Freelancer.com
I've been worked as an Electrical Engineer for more than 20 years. I'd like to bring Artificial Intelligence to the EE design so that it can be "Self-driving".
Senior Design Engineer at NASA-Goddard., Greenbelt, MD
Enthusiastic analog designer
I am a senior researcher in INESC-ID, Lisbon.
I am an Electronics Engineer with experience in IT Management, Firmware Development and Education. I spend my spare time looking for interesting projects and reading about technology trends.
José T. de Sousa holds a PhD degree from Imperial College London (1998) and has been a university lecturer and researcher at Lisbon University (1999-present). He holds 4 international patents, is co-author of one book, and was General Chair of the Field Programmable Logic and Applications Conference in 2013. Dr. de Sousa has published more than 70 technical papers in international journals and conferences. He was co-founder and CEO of Coreworks, a semiconductor intellectual property company, which he ran from 2001 to 2013. His specialties are digital circuit design, hardware/software architecture, technical team management and semiconductor IP marketing and sales.
Principle Engineer at efabless corporation
An experimental physicist through sensor and instrumentation development.
Expert in embedded and mobile applications since 2003. Has many years of experience in software and hardware development, effective team management. Excellent in the research and development, technology findings and implementations.
Eduardo is an Electrical Engineer engaged in hardware development with a true passion for developing and enhancing applications. While at university, he worked in a variety of projects, from VHDL in a SOC project, to a PCB for a power circuit, and even web interfaces for electronic devices network connected. He allies his technical background with great communication skills. He is used to and is passionate about working in diverse cultural environment as was his period as an international student in Japan. He also got a certification in in Digital Integrated Circuit Design and Project Flow with Cadence tools (IC Brazil Program). Currently he works at HT Micron, and is interested in positions related to chip design, hardware design, embedded software development and similar areas.
Research engineer and teaching assistant in microelectronic, microsystems and bioelectronic at the university of Liège, Belgium
Design engineer with combined R&D and industrial experience in developing analog/mixed signal ICs for applications including inductive position sensors and imager readouts. Proven abilities with widely used blocks including (but not limited to) filter, amplifier, ADC, DAC, voltage regulators, bandgap reference, ring/LC oscillator, comparator and custom digital logic circuitry. Experience with full tape-out flow including schematic design, analog/mixed-signal simulations, floor planning, layout, system-level verification and chip measurements. Strong familiarity with industry standard tools and instruments used for design, verification and testing such as Cadence, Synopsys, Mentor Graphics, and Keysight. Frontend digital hardware design (ASIC/FPGA) experience using Verilog HDL. Considerable exposure to ASIC backend flow (synthesis and PnR) using Synopsys Design Compiler and Cadence Innovus. Skilled with programming platforms such as MATLAB, C++, C#, Perl, UNIX Shell and VB. Strong education with Ph.D. and MSc. degrees in Electronics Engineering along with several peer-reviewed articles in IEEE journals.
MSC in Electrical Engineering BSC in Electronics Two patents in mathematical software in Engineering design and digital signal processing utility box Undergo private research for commercial use in the areas of very high frequency analog and digital circuits
I am enthuastic engineer who has been doing software engineering (Linux kernel), electronics, and now chip designs. My day job is leading teams (senior director) focusing on virtualization and security.
I'm a physics major studying at UC Berkeley interested in accelerating research and computational workloads with modern VLSI and FPGA tech.
Responsible for strategic partnerships and business development.
R&D product developer
Professor of CSE at UC Santa Cruz
Electrical Engineer, Digital Signal Processing, Chief Engineer
High schools tudent
I am designed mixed signal ICs for Music, Audio, IoT and sensor applications.
Dad. Partner. Scientist. Activist. Maker. — He/His
Artificial Intelligence/Machine Learning • Big Data • Internet of Things • Product Development
For most of my career, I was a CAD technology innovator and CAD system architect at Intel Corporation. I signed up recently for a Udemy class called "VSD - Making the Raven Chip: How to Design a RISC-V SoC." The class pointed me to Efabless.
R&D Engineer, interest in synthesis and verification software for electronics and photonics hardware
I am a High School Student, Entry Electrical Engineer, and Computer Scientist I love to tinker with stuff and to innovate new ideas.
I am a Ph.D. student at the School of Physical and Mathematical Sciences, NTU, Singapore. I co-designed the Romulus and Remus families of lightweight authenticated encryption modes with Tetsu Iwata, Kazuhiko Minematsu and Thomas Peyrin, which are the basis of three candidates for the NIST Lightweight Cryptography Competition. Previously, I got my BSc. in Electronics Engineering from Alexandria University, Egypt. My main research focus is the practical aspects of Symmetric Key Cryptography, which includes: Physical Security, Hardware Implementations, Practical Cryptanalysis and Primitive Design. Previous research projects also included the acceleration of Fully Homomorphic Encryption and Design and Verification of Digital Circuits.
Hobbiest and Dabbler in all things Electronics
Hi, I'm an Electrical & Computer Engineering + Computer Science student at Oregon State University.
I'm a Senior Researcher at the Barcelona Supercomputing Center and Junior Faculty at Polytechnic University of Catalonia (UPC). I'm the recipient of the RISC-V Educator of the Year Award 2019, for the advanced graduate course Processor Design I'm teaching at UPC, which is focused on the design of high-performance safety-critical systems. I'm the PI of the GPU4S project funded by the European Space Agency (ESA) in which we are investigating the applicability of embedded GPUs in space.
I would like to improve the tooling for open ASIC development and education with Rudder: https://github.com/0x01be/rudder
Digital Systems and Software Engineer (formerly in management VP and Director of engineering).
PhD Student @ UC Berkeley, formerly SWE @ Google
Software engineer, reverse software engineering, hardware design (have started with startup zilsel-invent.com)
ASIC design engineer at Google advancing high-level synthesis and next-generation computer architectures.
