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"profiles" search for "skills": System Verilog

Number of Results: 238

Zeeshan Rafique

Researcher at Micro Electronics Research Lab -UIT | RISC-V Ambassador

Arsenii Terekhov

Radio Signal Processing Enthusiast

Bhawandeep Singh

Linkedin - https://www.linkedin.com/in/bhawandeep-singh-1b164517/ PhD student in CSE department in UCSC, advised by Prof. Jose Renau. My areas of majors are CPU design, digital design and embedded software.

Klas Nordmark

Digital designer and embedded software developer. Experience from telecom and computer vision.

Julio

RTL Engineer

Area of Expertise

Digital: RTL

George Duffy

Area of Expertise

Digital: RTL

Bo Lu

Area of Expertise

Analog: Design

Federico Paredes

Digital designer experienced in high-speed ASICs for optical/copper transceivers, including DSPs, error correction and SoC support.

Martin Simlastik

digital ASIC designer with 10+ yrs experience

Paulo Roberto Bueno de Carvalho

Paulo Roberto B. de Carvalho is a Hardware and Digital IC Design Engineer with 6-years experience in microelectronic area in Digital IC Design, with specialization in RTL design optimization for area and power reduction, Verification and Physical Implementation flow. He has 10-years experience in Application Engineering, technical consultant and semiconductors manufacture processes. He received his bachelor degree in materials, processes and electronic components technology at Faculdade de Tecnologia de Sao Paulo (FATEC-SP) in 2006. In 2011, he joined the Brazillian Federal Government IC Brazil Program of the Ministry of Science, Technology and Innovation (MCTI), trained in Digital Systems Design area. He received his Master of Science degree in Electric Engineering with specialization in Microelectronic area on Integrated Systems Laboratory at Electrical Engineering Department of Polytechnic School of University of Sao Paulo in 2016.

Bob Ledzius

35 years mixed signal SoC, ASIC, and FPGA design and management experience. Concertal provides rapid functional IP integration using proprietary System Design Automation technology that includes delivery of RTOS capable fabric that supports loosely coupled HW operation including IP NbC (Network beyond the Chip). IP areas of expertise include common interfaces, data converters, modulators, digital filters, DSP, processors, FSM, and other custom specified functionality.

Santhosh

IP & SoC Verification Engineer

Jose T. de Sousa

José T. de Sousa holds a PhD degree from Imperial College London (1998) and has been a university lecturer and researcher at Lisbon University (1999-present). He holds 4 international patents, is co-author of one book, and was General Chair of the Field Programmable Logic and Applications Conference in 2013. Dr. de Sousa has published more than 70 technical papers in international journals and conferences. He was co-founder and CEO of Coreworks, a semiconductor intellectual property company, which he ran from 2001 to 2013. His specialties are digital circuit design, hardware/software architecture, technical team management and semiconductor IP marketing and sales.

J. Rodriguez

Mixed background in computer science, applied mathematics and electrical engineering. Expert in algorithms to custom core development, system architecture, integration and functional verification.

Vishal Prafulkumar Katigar

Trained in ASIC verification from Maven silicon Bengaluru Also having experience in embedded domain (PCB layout design)

Marco Merlin

Electronics Engineer with 10 years experience in microelectronics and research. Familiar with CMOS integrated circuits design, wireless communication systems, programming and lab environment, I am comfortable working for worldwide semiconductors firms. Passionate for high-tech and music, advocate for teamwork and collective intelligence to support a strong problem-solving methodology, I am curious, self-motivated, addicted to learning and re-shaping the new technologies I am exposed to. During my workday I aspire to address "real-life problems", hopefully continuing to develop my multi-disciplinary skills as a means for technical and personal enrichment.

Umer Imran

Umer Imran is eager to work in the field of Computer Architecture and Memory Consistency. He is currently working as a Design Verification Engineer at Lampro Mellon, a training firm with the vision to transform Pakistan’s talent pool into leaders of RISC-V based SoC design. He constantly aims to gain expertise in the various domains of SoC Design including IP Design, ASICs, and low power architectures.

Augustine Kuo

Vice President of Engineering - Seamless Microsystems. We design high performance AFEs using proprietary and patented technology that encodes the signal in the time-domain instead of voltage or current. This enables us to design low-power ADCs and amplifiers in scaled CMOS. Contact us if you'd like to hear more and engage our services.

Alfonso Chacon-Rodriguez

Professor in Electronics Engineering with a PhD. in VLSI (Universidad Nacional de Mar del Plata). Expertise in digital RTL and physical design. Experience in FPGA RTL and HLS design for heterogeneous computing. Knowledge in sub-threshold analog design. Fiction writer (National Literature Award for Novel, 2011, Costa Rica)

Komal Javed

A young and ambitious individual, eager to apply my knowledge of Computer Architecture and VLSI Physical Design to develop hardware that is performance, power and area efficient, while actively contributing to the development and growth of the open-source semi-conductor industry

MAYANK VASHISHT

Interested in Design, Verification, and Hand-off of Analog IPs. Worked on the definition, modeling, design, verification of DC-DC converters, Chargers, Ideal-Diodes, LDOs, Regulators, Bandgap references, Current limiting and sensing architectures. Excited for challenges in Analog Design, Layout and Post-silicon verification.

Eduardo Augusto da Costa

Eduardo is an Electrical Engineer engaged in hardware development with a true passion for developing and enhancing applications. While at university, he worked in a variety of projects, from VHDL in a SOC project, to a PCB for a power circuit, and even web interfaces for electronic devices network connected. He allies his technical background with great communication skills. He is used to and is passionate about working in diverse cultural environment as was his period as an international student in Japan. He also got a certification in in Digital Integrated Circuit Design and Project Flow with Cadence tools (IC Brazil Program). Currently he works at HT Micron, and is interested in positions related to chip design, hardware design, embedded software development and similar areas.

Arun Jeevaraj

ASIC Developer at Ericsson, trying hands with the open source tool flow.

Area of Expertise

Digital: RTL

Daniel Limbrick

I am currently an Associate Professor in the Electrical and Computer Engineering Department at North Carolina Agricultural and Technical State University (NC A&T). As director of the Automated Design for Emerging Process Technologies (ADEPT) laboratory at NC A&T, I research the following questions: (1) how can we make computers more reliable in harsh environments (i.e., ionizing particles, malicious fault injection) and (2) how can we extend Moore’s law (e.g., 3D IC)? To answer these questions, he interrogates the traditional abstraction layers of integrated circuit design (i.e., functional description, circuit design, physical design) to discover design methodologies that are more relevant to these goals.

James Stine

Edward Joullian Endowed Chair in Engineering Oklahoma State University Department of Electrical and Computer Engineering VLSI Computer Architecture Research Group

Siva Prasad

Hardware Design Engineer

Priyanka Dutta

current Phd Student in UCSC Hardware System Collective group formerly worked in Qualcomm Wireless R&D team as a design verification engineer

Kranthi Kumar Pamarthi

I am passionate about all areas of VLSI Design and trying my level best to be an expert in the entire flow, analog, digital and mixed signal. Beyond chips, I like poetry, skating, skydiving, late night swimming and trekking in no particular order.

Rouhan Noor

I am an Electrical Engineering working VLSI design farm with 7 tape-out experiences.

Renaud GILLON

Program manager with more than 25 years experience in the semiconductor industry. Expertise in EDA tools, analogue, RF and high-voltage PDK development, sensor design, design support for electro-magnetic compatibility, ESD and functional safety.

veena S Chakravarthi

SoC Architect.Technologist. Hands-on experience in complex low power SoC designs, from concept to production. Excellent track record in successful development and production of ASICs, Technologies: Bluetooth, WLAN, IoT, Gigabit Ethernet, EPON networks, Interface ICs, Broadcast TV and Communication controllers. Demonstrated consistent track record of first-pass silicon success. PhD in Low power VLSI. Recipient of US and Indian patents. Core Competency: Chip Architecture, Micro Architecture, logic design, RTL Verilog coding, Chip level verification, Static Timing analysis, Formal Verification, design rule checking, AXI, AHB and APB bus protocols, Digital ASIC methodology, DFT methodology, Low Power ASIC design, Interfacing with backend teams, Timing closure, Post silicon bring up and validation, Project Planning, Scheduling and Management, FPGA Prototyping. Author of Book "A Practical Approach to VLSI System on Chip (SoC) Design" published by Springer Nature. Domain experience: Communications, EPON, WLAN, Bluetooth, IoT, Healthcare, Nextgen TV, Automotive. Managed dynamic, cross cultural teams of size 40 to 100. Standards worked on IEEE802.3, IEEE802.11b, ac, ad. ATSE 3.0, Automotive ethernet, Bluetooth Quality standards: ISO 9002, ISO 13485, IEC 60601-2 Funded Research: Derivative Low power standard cell library development PhD Guidance: 2 one in Asynchronous VLSI design methodology and second in Sub 1V power supply for complex SoCs. Co-founded healthcare company:Sensesemi Technologies Pvt. Ltd. Academic research head and taught engineering students for their undergrad, Post grad and PhD courses Chair, IEEE NanoTechnology Council, Bangalore Section as a founder Chairperson, Current Senior IEEE member.

Marc C.

Area of Expertise

Digital: RTL

Chaganati Harsha Vardhan Reddy

I'm Harsha, pursuing my under graduation in the stream of Electronics and Communication Engineering at SRM University AP

Sajjad Ahmed

I am an undergrad student of computer system engineering at Usman Institute of Technology. and working on RISCV based SoC designs since 2019 in Microelectronics Research Lab.

Syed Asad Alam

Post-doctoral research fellow in the discipline of Software and Systems, School of Computer Science and Statistics, Trinity College Dublin, with a keen interest in learning new things, specially related to computer science and engineering. Around 4 years experience of teaching and research and more than 10 years of experience in architecture design, optimization, analysis, implementation and verification of digital and digital signal processing systems on FPGAs and ASICs. Diversifying research career by working on quantization of deep convolution neural networks. Author of three peer reviewed journal publications and five international conference publications.

Klaus Strohmayer

Independent Digital Design and Verification Expert with more than 20+ years of experience and founder of semify. While working for established semiconductor companies like Infineon, Dialog Semiconductor and NXP I was responsible for bringing ideas into working ASICs. I developed USound’s first ASIC from FPGA based prototyping to tapeout with minimal resourcing, demanding timeline and tight area and power consumption constraints. Currently I'm acting as a consultant for easyIC and Cypress / Infineon. In addition I'm is also lecturer at the FH Joanneum Graz and guest lecturer at the Technical University Graz.

Swapnil ..

Chief Engineer Embedded Systems, VLSI startup

Darshan Guled

hello, my name is Darshan Guled, i am an engineering student and i am working on PICO RISc processor and RAVEN chip,

Prasanna Kumar Talari

just a beginner in asic

Swapnil Rawat

I am a student pursuing my masters in the field of VLSI

ABHIJEET SINGH JADON

currently doing mtech in vlsi domain,want to gain knowledge in physical design and asic design flow

Area of Expertise

Academic: Student

Aditya Mudgal

Doing Mtech in VLSI Design from IIIT Bangalore

Rakesh Singanahalli

Hello I am Rakesh , I am pursuing my Under Graduation in Electronics and Communication Engineering at KLE Technological University, Hubballi. I am looking ahead work in Digital VLSI Domain. :D

Sultan Bepari

Hello I'm sultan, and I'm from KLE technological University hubli and I'm very exited to do this course on picorisc.

Shivam Potdar

RISC-V Enthusiast GSoC 2020 @ FOSSi Foundation RA @ CAD Lab, IISc Bengaluru, India EE Senior @ NITK Mangalore, India

Venkata Anurag N/A Atmakuri

I’m an engineer always looking to learn, optimize and automate. I work on data analytics to provide deep insights into hardware designs, particularly physical design flow. Exploring areas to facilitate design engineers in taking data driven decisions for faster design turnaround times. I like to think about life. I like experimenting with different techniques (using software tools and meditation) to optimize my day and work effectively. In my free time, I’m learning Web Programming to build my own blog. I know there are templates and websites but where’s the fun and learning if you don’t do it from scratch? I like mentoring students on how to approach career and life in general.

Geethanand N

Ex intel professional with over 5 years of experience in front end Vlsi

vinay k s

Verification engineer and quick learner and really enthusiastic to learn new things

Area of Expertise

SoC: Verification

Manish Mahajan

I am a design / verification Engineer for ASIC and FPGA .

Anurag Darbari

SubIP and SoC Design Verification Engineer. Extends to running Full Chip Emulation on Palladium and Protium Platforms.

Zain Rizwan Khan

Research Associate at Micro Electronics Research Lab (MERL) working as a hardware design engineer.

Steven Herbst

I'm a PhD student working to make mixed-signal chip design more accessible, drawing inspiration from software development techniques. Prior to starting the PhD program, I spent a number of years working in industry at both the chip- and PCB-level on optical sensors and power systems.

Mustafa Khairallah

I am a Ph.D. student at the School of Physical and Mathematical Sciences, NTU, Singapore. I co-designed the Romulus and Remus families of lightweight authenticated encryption modes with Tetsu Iwata, Kazuhiko Minematsu and Thomas Peyrin, which are the basis of three candidates for the NIST Lightweight Cryptography Competition. Previously, I got my BSc. in Electronics Engineering from Alexandria University, Egypt. My main research focus is the practical aspects of Symmetric Key Cryptography, which includes: Physical Security, Hardware Implementations, Practical Cryptanalysis and Primitive Design. Previous research projects also included the acceleration of Fully Homomorphic Encryption and Design and Verification of Digital Circuits.

Micro Electronics Research LAB (MERL)

I am currently working as a Research Associate. We are doing research and development on RISC-V Technology.

Ali Ahmed, Ph.D.

Ali Ahmed is an Assistant Professor of Electrical Engineering at UiT, Karachi. His current broader research interests are in computer architecture, IoT, and Information Security. He is especially interested in micro-architecture, with a major current focus on memory and storage systems. He has 10+ year experience in complete Product development Cycle of CoTs (hardware and software). Involved in product development from scratch, hardware designing, middle ware and application level development. Well versed in hardware platforms like FPGA s and Microcontrollers. He obtained his PhD and MS in ECE from the Hanyang University, South Korea where he designed and Implemented memory architecture of SRAM-based Ternary Content Addressable Memory using Xilinx Kintex-7 FPGA ( http://ieeexplore.ieee.org/document/7797247/) He obtained BE degrees in Electronics Engineering from the NED university of Engineering and Technology, Karachi. His industrial experience spans starting the Product development division at Horizon Tech, Islamabad (2008-2012).

Joel Sanchez Moreno

My name is Joel Sanchez Moreno I graduated as a Computer engineer and I currently work as a full time RTL design engineer for a start up. In addition, I am doing a part-time master on High Performance Computing on the Universitat Politècnica de Catalunya (UPC)

Anthony Kung

Hi, I'm an Electrical & Computer Engineering + Computer Science student at Oregon State University.

Sriharsha Ganti

Dynamic and career-oriented VLSI Verification Trainee. Looking for a responsible position as a VLSI verification engineer with a view to utilize and enhance my skills and experience towards professional and personal growth.

John Martinuk

Graduate Teaching Assistant of Purdue University's SoCET Team

Sathyanarayanan

I am accomplished digital design engineer having 8 years of industrial expertise . I am currently working on IP design and IP integrations stuffs .

Thiago Cruz

Area of Expertise

Microeletronica

Henrique Oliveira Leite Aroeira de Assis

Electrical Engineer, pursuing a Masters in Microelectronics