Chip Creation Made Simple

chipIgnite provides you with a pre-built chip for integrating your custom design and an automated open-source design flow making it easy and affordable.
 
Only $9750 per project

Join the 1st Chipalooza Analog & Mixed-Signal Design Challenge
Design Your 1st Chip for
Only $300

chipIgnite is the Perfect Solution for...

Startups

A rapid and affordable path to prototyping and low-volume production without tools and expertise needed.

  • Development based on open-source tools
  • Reference designs and automated design flows
  • Limited expertise needed
  • Large design community
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Universities

Providing a real-world chip fabrication experience to students and attracting new students to microelectronics design.

  • Open-source technology access, no legal agreements
  • Collaborate freely across teams and organizations
  • Accelerated design flows enable effective learning within a course session
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Research

Enabling easy access to technology and cost-effective fabrication

  • Access to fabrication services
  • Open-source technology and reference designs
  • Collaborate freely across teams and organizations
  • Large design community
Learn More

chipIgnite Shuttle Schedule

CI 2404CI 2406CI 2409CI 2411
Engineering Samples100 QFN100 QFN100 QFN100 QFN
Evaluation BoardsYesYesYesYes
Tapeout DateApril 24, 2024June 3, 2024September 16, 2024November 11, 2024
Delivery DateSeptember 20, 2024November 1, 2024February 14, 2025April 11, 2025
Bare Die Option
Reram Support
Request QuoteRequest QuoteRequest QuoteRequest Quote

>> Check the Status for Shuttles in Fabrication <<

Checkout the Silicon Showcase

See examples of fabricated silicon in action.

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What Do You Get with chipIgnite ?

A complete chip design with a RISC-V core for hosting your design

Provides power, IO and housekeeping functions for your design

Access to an open-source automated design flow

For implementing your design hosted inside the chip

10 sq mm of project space

Large area within the chip for hosting your design.

38 programmable IO's

Flexibly configurable supporting digital and analog signals

100 engineering samples

Fully assembled QFN parts. Pre-designed to match the chip IO pads

evaluation PCB boards

Your parts assembled on pre-designed evaluation boards ready to test

Firmware and test tools

Sample firmware, programming utilities and a test framework to jumpstart your testing.

Supports commercial EDA tools as well

Use commercial EDA tools to implement your project or sub-project macros. Open-source tools can still be used for the final integration and assembly.

We are Supported by the Semiconductor Industry

What do you need to get started?

Beginner

Software Developer / Product Designer

  • Start with an automated design generated from Python
  • Integrate new functions from a library of components
  • Regenerate and implement a new design in minutes or hours

Intermediate

Embedded / FPGA Designer

  • Start with one of many reference designs from our community
  • Modify or replace the Verilog code to create your new design
  • Extend the existing test benches to verify your project
  • Regenerate and implement a new design in hours or days

Advanced

SoC or Mixed-signal ASIC Designer

  • Start with a full chip reference design that integrates a custom digital or analog M/S project
  • Develop your circuit using open-source or commercial EDA tools
  • Add to the existing test benches for the chip carrier to verify your functionality
  • Implement a new design in days or weeks

Our results

We've been building Efabless since 2014.

Thriving Community of 1000's of Chip Designers

 
Have an idea but lack the resources or expertise? We have a large community of boutique firms, individual chip designers and prosumer hobbyists trained on our software and ready to bring your idea to market.

Over 200 Chip Designs have gone to Fabrication

 
Our platform and users have a demonstrated track record of success

Cost-effective and flexible process technology

 
The 130nm process technology supports a broad range of designs including analog, complex digital and mixed-signal designs.

Open-source Assets

 
There are over 300+ IP and reference designs that can be forked and added so you can speed up your design. The library is growing and the assets are being used by various projects to build chips.

Who Are We?

Efabless is a free cloud-based chip design platform, growing community of 1000+ chip designers, and fabrication friendly technology company that takes you from idea to silicon inside your product.

Only chipIgnite provides a complete end-to-end solution for creating your own chip at a very low cost

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How it works

Follow these steps to create and submit your project

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Register

If you haven't already, register for a free account on the Efabless platform. You can use LinkedIn, Google or Github credentials to login.

If you want to setup a company account, contact us...

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Create a Project Repo

You will need a Github account if you don't already have one. Start by creating a new repository for your project based on the caravel_user_project template and make sure your repo is public and includes a README.

Select a Shuttle

Select the shuttle you want to target for your project. Each shuttle has its own project submission deadline and schedule for delivering parts. Each shuttle also provides different packaging and part counts.

Create a project for the shuttle providing the link for your new project repository. You can continue to update your project until you click 'submit' on the shuttle management page.

Provide you billing information on the project page and pay a $200 deposit to reserve your space.

Integrate Your Design

You will need a Linux or Mac desktop with Docker to implement your design. Follow the documentation to replace the example with your digital design. Implement your design using the open-source design flow included with the project.

You can also clone one of the projects for a library of open-source community designs.

Or use commercial design tools to implement your design and integrate it with the reference chip.

Submit Your Project

Update your project on the Efabless platform. Submit a precheck job for your project to make sure it meets all the criteria for final assembly and fabrication.

With a successful precheck, now submit a final 'tapeout' job to build the final chip layout for your project. Mark your project as complete and you are ready to go.

Get Parts

After fabrication, we will package dies for your project and assemble some of your parts on evaluation boards for testing. We ship both packaged parts and boards to you.

If you need bare dies, contact us to see what might be possible.

Once you have your parts and boards, clone our open-source repo to get diagnostics and tools for programming the flash as well as firmware and software test frameworks to jumpstart testing your project and developing firmware.

Reference Chip Design Specifications

chipIgnite provides design and fabrication of a semi-custom ASIC incorporating your own design within a 10mm2 user area on the chip. The carrier chip provides all the infrastructure required for building a chip including IO and power, clock, reset, and a management SoC that can be used to drive your project.

The management SoC includes a RISC-V processor, SRAM and a wishbone bus that extends into the user area for connecting your own peripherals.

Features:

  • 38 programmable IO's
  • 10 mm2 of User Project Area
  • Diagnostic port including IO configuration and Flash pass-thru access for programming
  • VexRiscv CPU with debug
  • 3 kbytes of RAM
  • Flash controller supporting execute-in-place
  • SPI, UART and GPIO
  • Counter/Timers
  • 128 signal logic analyzer for project

Find the documentation here

Check us out!

Connect with us on Github, Slack or Hackster

FAQ